Design and Simulate
The SA-200 amplifier section schematic is seen below. It is a fairly standard 3 stage amplifier design, with a differential input, VAS (Voltage Amplification Stage) and Output stage. Extensive SPICE simulations were done on the amplifier to refine component selections using National Instruments' Multisim.
Some design decisions:
- Use voltage follower input buffer to create high input impedance, and immediately filter out any high frequency noise and RF.
- AC couple this stage to prevent any possible damage from a fault in the source equipment.
- Use "long tail pair" differential input, combined with constant current source and current mirror to reduce distortion, improve slew rate.
- Make the differential input source impedance as low as possible to prevent bias currents from generating excessive DC offset voltage at the input.
- Use a Darlington VAS to reduce loading on the input stage.
- Use Two Pole Compensation in the VAS, instead of traditional Miller compensation, to drive low distortion performance at 20kHz.
- Use emitter follower Bipolar Junction Transistor output stage configuration with three transistors per rail, to stay within the Safe Operating Area (SOA) of the transistors.
- Isolate power supply grounds from signal grounds. Insert 10 Ohm resistor between signal ground and earth ground to reduce chance of ground loop hum.
the bias spreader transistor directly on one of the output transistors
in order to have close thermal tracking and prevent thermal runaway.
- Design to accommodate either an output triple configuration, or a traditional pre-driver/driver output stage.
- Speaker protection in the form of offset voltage monitoring, and rail voltage monitoring.
circuit protection via VI limiter is included on PCB but left
unpopulated as it created distortion through its monitoring at high
- Short circuit
protection is provided via sometimes admittedly unreliable power supply rail
fuses but included to reduce distortion that would have been induced by VI limiter protection circuitry.
- Thermal protection supplied by thermistor mounted on output transistor, triggered at 80 degrees centigrade.